In this figure, T 1 has 3 emitters thus there can be three inputs A, B, C. Multiple emitter transistors along with about 60 emitters have been developed. Such transistor can be thought of like a combination of various transistors along with a common collector and base. T 1 is a multiple type emitter transistor. The low output impedance means a short time constant RC therefore the output can change rapidly from one state to the other. The totem pole output implies that transistor T 4 sits atop T 3 in order to give low output impedance. Operation of TTL NAND Gate: Fig.(d) Demonstrates a TTL NAND gate with a totem pole output. Give the circuit of a TTL NAND gate and explain its operation in brief.
